Publications

Filtered as: all types - all years - all authors - keyword: Hardware
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Corresponding bibtex list 

Akin, Berkin 

1. Berkin Akin, James C. Hoe and Franz Franchetti
   HAMLeT: Hardware Accelerated Memory Layout Transform within 3D-stacked DRAM
   Proc. IEEE High Performance Extreme Computing (HPEC), 2014
   
2. Berkin Akin, Franz Franchetti and James C. Hoe
   Understanding the Design Space of DRAM-optimized Hardware FFT Accelerators
   Proc. IEEE International Conference on Application-Specific Systems, Architectures and Processors (ASAP), pp. 248-255, 2014
   

Cai, M. 

1. J. Nguyen, M. Cai, Z. Zuo, L. Tang, K. Mai and Franz Franchetti
   LIMA: Hardware for FFT based Large Integer Multiplication
   Proc. High Performance Extreme Computing (HPEC), 2022
   

Franchetti, Franz 

1. J. Nguyen, M. Cai, Z. Zuo, L. Tang, K. Mai and Franz Franchetti
   LIMA: Hardware for FFT based Large Integer Multiplication
   Proc. High Performance Extreme Computing (HPEC), 2022
   
2. F. Sadi, Joe Sweeney, S. McMillan, Tze-Meng Low, James C. Hoe, Lawrence Pileggi and Franz Franchetti
   PageRank Acceleration for Large Graphs with Scalable Hardware and Two-Step SpMV
   Proc. High Performance Extreme Computing (HPEC), 2018
   
3. F. Sadi, Lawrence Pileggi and Franz Franchetti
   Algorithm and Hardware Co-Optimized Solution for Large SpMV Problems
   Proc. High Performance Extreme Computing (HPEC), IEEE, pp. 1-7, 2017
   
4. Berkin Akin, James C. Hoe and Franz Franchetti
   HAMLeT: Hardware Accelerated Memory Layout Transform within 3D-stacked DRAM
   Proc. IEEE High Performance Extreme Computing (HPEC), 2014
   
5. Berkin Akin, Franz Franchetti and James C. Hoe
   Understanding the Design Space of DRAM-optimized Hardware FFT Accelerators
   Proc. IEEE International Conference on Application-Specific Systems, Architectures and Processors (ASAP), pp. 248-255, 2014
   
6. Qiuling Zhu, H. E. Sumbul, F. Sadi, James C. Hoe, Lawrence Pileggi and Franz Franchetti
   Accelerating Sparse Matrix-Matrix Multiplication with 3D-Stacked Logic-in-Memory Hardware
   Proc. High Performance Extreme Computing (HPEC), pp. 1-6, 2013
   
7. Qiuling Zhu, Lawrence Pileggi and Franz Franchetti
   Cost-Effective Smart Memory Implementation for Parallel Backprojection in Computed Tomography
   Proc. IFIP/IEEE Internationa Conference on Very Large Scale Integration, pp. 111-116, 2012
   
8. Qiuling Zhu, Lawrence Pileggi and Franz Franchetti
   Smart Memory Synthesis for Energy-Efficient Computed Tomography Reconstruction
   Proc. SRC TECHCON, 2012
   

Hoe, James C. 

1. F. Sadi, Joe Sweeney, S. McMillan, Tze-Meng Low, James C. Hoe, Lawrence Pileggi and Franz Franchetti
   PageRank Acceleration for Large Graphs with Scalable Hardware and Two-Step SpMV
   Proc. High Performance Extreme Computing (HPEC), 2018
   
2. Berkin Akin, James C. Hoe and Franz Franchetti
   HAMLeT: Hardware Accelerated Memory Layout Transform within 3D-stacked DRAM
   Proc. IEEE High Performance Extreme Computing (HPEC), 2014
   
3. Berkin Akin, Franz Franchetti and James C. Hoe
   Understanding the Design Space of DRAM-optimized Hardware FFT Accelerators
   Proc. IEEE International Conference on Application-Specific Systems, Architectures and Processors (ASAP), pp. 248-255, 2014
   
4. Qiuling Zhu, H. E. Sumbul, F. Sadi, James C. Hoe, Lawrence Pileggi and Franz Franchetti
   Accelerating Sparse Matrix-Matrix Multiplication with 3D-Stacked Logic-in-Memory Hardware
   Proc. High Performance Extreme Computing (HPEC), pp. 1-6, 2013
   

Low, Tze-Meng 

1. F. Sadi, Joe Sweeney, S. McMillan, Tze-Meng Low, James C. Hoe, Lawrence Pileggi and Franz Franchetti
   PageRank Acceleration for Large Graphs with Scalable Hardware and Two-Step SpMV
   Proc. High Performance Extreme Computing (HPEC), 2018
   

Mai, K. 

1. J. Nguyen, M. Cai, Z. Zuo, L. Tang, K. Mai and Franz Franchetti
   LIMA: Hardware for FFT based Large Integer Multiplication
   Proc. High Performance Extreme Computing (HPEC), 2022
   

McMillan, S. 

1. F. Sadi, Joe Sweeney, S. McMillan, Tze-Meng Low, James C. Hoe, Lawrence Pileggi and Franz Franchetti
   PageRank Acceleration for Large Graphs with Scalable Hardware and Two-Step SpMV
   Proc. High Performance Extreme Computing (HPEC), 2018
   

Nguyen, J. 

1. J. Nguyen, M. Cai, Z. Zuo, L. Tang, K. Mai and Franz Franchetti
   LIMA: Hardware for FFT based Large Integer Multiplication
   Proc. High Performance Extreme Computing (HPEC), 2022
   

Pileggi, Lawrence 

1. F. Sadi, Joe Sweeney, S. McMillan, Tze-Meng Low, James C. Hoe, Lawrence Pileggi and Franz Franchetti
   PageRank Acceleration for Large Graphs with Scalable Hardware and Two-Step SpMV
   Proc. High Performance Extreme Computing (HPEC), 2018
   
2. F. Sadi, Lawrence Pileggi and Franz Franchetti
   Algorithm and Hardware Co-Optimized Solution for Large SpMV Problems
   Proc. High Performance Extreme Computing (HPEC), IEEE, pp. 1-7, 2017
   
3. Qiuling Zhu, H. E. Sumbul, F. Sadi, James C. Hoe, Lawrence Pileggi and Franz Franchetti
   Accelerating Sparse Matrix-Matrix Multiplication with 3D-Stacked Logic-in-Memory Hardware
   Proc. High Performance Extreme Computing (HPEC), pp. 1-6, 2013
   
4. Qiuling Zhu, Lawrence Pileggi and Franz Franchetti
   Cost-Effective Smart Memory Implementation for Parallel Backprojection in Computed Tomography
   Proc. IFIP/IEEE Internationa Conference on Very Large Scale Integration, pp. 111-116, 2012
   
5. Qiuling Zhu, Lawrence Pileggi and Franz Franchetti
   Smart Memory Synthesis for Energy-Efficient Computed Tomography Reconstruction
   Proc. SRC TECHCON, 2012
   

Püschel, Markus 

1. Francois Serre and Markus Püschel
   Optimal Circuits for Streamed Linear Permutations using RAM
   Proc. FPGA, pp. 215-223, 2016
   

Sadi, F. 

1. F. Sadi, Joe Sweeney, S. McMillan, Tze-Meng Low, James C. Hoe, Lawrence Pileggi and Franz Franchetti
   PageRank Acceleration for Large Graphs with Scalable Hardware and Two-Step SpMV
   Proc. High Performance Extreme Computing (HPEC), 2018
   
2. F. Sadi, Lawrence Pileggi and Franz Franchetti
   Algorithm and Hardware Co-Optimized Solution for Large SpMV Problems
   Proc. High Performance Extreme Computing (HPEC), IEEE, pp. 1-7, 2017
   
3. Qiuling Zhu, H. E. Sumbul, F. Sadi, James C. Hoe, Lawrence Pileggi and Franz Franchetti
   Accelerating Sparse Matrix-Matrix Multiplication with 3D-Stacked Logic-in-Memory Hardware
   Proc. High Performance Extreme Computing (HPEC), pp. 1-6, 2013
   

Serre, Francois 

1. Francois Serre and Markus Püschel
   Optimal Circuits for Streamed Linear Permutations using RAM
   Proc. FPGA, pp. 215-223, 2016
   

Sumbul, H. E. 

1. Qiuling Zhu, H. E. Sumbul, F. Sadi, James C. Hoe, Lawrence Pileggi and Franz Franchetti
   Accelerating Sparse Matrix-Matrix Multiplication with 3D-Stacked Logic-in-Memory Hardware
   Proc. High Performance Extreme Computing (HPEC), pp. 1-6, 2013
   

Sweeney, Joe 

1. F. Sadi, Joe Sweeney, S. McMillan, Tze-Meng Low, James C. Hoe, Lawrence Pileggi and Franz Franchetti
   PageRank Acceleration for Large Graphs with Scalable Hardware and Two-Step SpMV
   Proc. High Performance Extreme Computing (HPEC), 2018
   

Tang, L. 

1. J. Nguyen, M. Cai, Z. Zuo, L. Tang, K. Mai and Franz Franchetti
   LIMA: Hardware for FFT based Large Integer Multiplication
   Proc. High Performance Extreme Computing (HPEC), 2022
   

Zhu, Qiuling 

1. Qiuling Zhu, H. E. Sumbul, F. Sadi, James C. Hoe, Lawrence Pileggi and Franz Franchetti
   Accelerating Sparse Matrix-Matrix Multiplication with 3D-Stacked Logic-in-Memory Hardware
   Proc. High Performance Extreme Computing (HPEC), pp. 1-6, 2013
   
2. Qiuling Zhu, Lawrence Pileggi and Franz Franchetti
   Cost-Effective Smart Memory Implementation for Parallel Backprojection in Computed Tomography
   Proc. IFIP/IEEE Internationa Conference on Very Large Scale Integration, pp. 111-116, 2012
   
3. Qiuling Zhu, Lawrence Pileggi and Franz Franchetti
   Smart Memory Synthesis for Energy-Efficient Computed Tomography Reconstruction
   Proc. SRC TECHCON, 2012
   

Zuo, Z. 

1. J. Nguyen, M. Cai, Z. Zuo, L. Tang, K. Mai and Franz Franchetti
   LIMA: Hardware for FFT based Large Integer Multiplication
   Proc. High Performance Extreme Computing (HPEC), 2022
   

Publication interface designed and implemented by Patra Pantupat, Aliaksei Sandryhaila, and Markus Püschel
Electrical and Computer Engineering, Carnegie Mellon University, 2007