Publications
Filtered as:
all types
- all years
- all authors
- keyword:
Hardware
Sorted by:
keyword
Corresponding
bibtex list
Hardware
- J. Nguyen, M. Cai, Z. Zuo, L. Tang, K. Mai and Franz Franchetti
LIMA: Hardware for FFT based Large Integer Multiplication
Proc. High Performance Extreme Computing (HPEC), 2022
- F. Sadi, Joe Sweeney, S. McMillan, Tze-Meng Low, James C. Hoe, Lawrence Pileggi and Franz Franchetti
PageRank Acceleration for Large Graphs with Scalable Hardware and Two-Step SpMV
Proc. High Performance Extreme Computing (HPEC), 2018
- F. Sadi, Lawrence Pileggi and Franz Franchetti
Algorithm and Hardware Co-Optimized Solution for Large SpMV Problems
Proc. High Performance Extreme Computing (HPEC), IEEE, pp. 1-7, 2017
- Francois Serre and Markus Püschel
Optimal Circuits for Streamed Linear Permutations using RAM
Proc. FPGA, pp. 215-223, 2016
- Berkin Akin, James C. Hoe and Franz Franchetti
HAMLeT: Hardware Accelerated Memory Layout Transform within 3D-stacked DRAM
Proc. IEEE High Performance Extreme Computing (HPEC), 2014
- Berkin Akin, Franz Franchetti and James C. Hoe
Understanding the Design Space of DRAM-optimized Hardware FFT Accelerators
Proc. IEEE International Conference on Application-Specific Systems, Architectures and Processors (ASAP), pp. 248-255, 2014
- Qiuling Zhu, H. E. Sumbul, F. Sadi, James C. Hoe, Lawrence Pileggi and Franz Franchetti
Accelerating Sparse Matrix-Matrix Multiplication with 3D-Stacked Logic-in-Memory Hardware
Proc. High Performance Extreme Computing (HPEC), pp. 1-6, 2013
- Qiuling Zhu, Lawrence Pileggi and Franz Franchetti
Cost-Effective Smart Memory Implementation for Parallel Backprojection in Computed Tomography
Proc. IFIP/IEEE Internationa Conference on Very Large Scale Integration, pp. 111-116, 2012
- Qiuling Zhu, Lawrence Pileggi and Franz Franchetti
Smart Memory Synthesis for Energy-Efficient Computed Tomography Reconstruction
Proc. SRC TECHCON, 2012
