Publications

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Corresponding bibtex list 

Akin, Berkin 

1. Berkin Akin, Franz Franchetti and James C. Hoe
   HAMLeT Architecture for Parallel Data Reorganization in Memory
   IEEE Micro, Vol. 36, No. 1, pp. 14-23, 2016
   
2. Qiuling Zhu, Berkin Akin, H. E. Sumbul, F. Sadi, James C. Hoe, Lawrence Pileggi and Franz Franchetti
   A 3D-Stacked Logic-in-Memory Accelerator for Application-Specific Data Intensive Computing
   Proc. IEEE International 3D Systems Integration Conference (3DIC), pp. 1-7, 2013
   
3. Berkin Akin, Peter A. Milder, Franz Franchetti and James C. Hoe
   Algorithm and Architecture Optimization for Large Size Two Dimensional Discrete Fourier Transform
   ACM/SIGDA International Symposium on Field Programmable Gate Arrays (FPGA), 2012
   

Brinich, P. 

1. N. Zhang, A. Ebel, N. Neda, P. Brinich, B. Reynwar, A. G. Schmidt, M. Franusich, Jeremy Johnson, B. Reagen and Franz Franchetti
   Generating High-Performance Number Theoretic Transform Implementations for Vector Architectures
   Proc. IEEE High Performance Extreme Computing (HPEC), 2023
   

Chen, Tianshi 

1. Qi Guo, Tianshi Chen, Y. Chen and Franz Franchetti
   Accelerating Architectural Simulation Via Statistical Techniques: A Survey
   IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Vol. 35, No. 3, pp. 433-446, 2016
   

Chen, Y. 

1. Qi Guo, Tianshi Chen, Y. Chen and Franz Franchetti
   Accelerating Architectural Simulation Via Statistical Techniques: A Survey
   IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Vol. 35, No. 3, pp. 433-446, 2016
   

Ebel, A. 

1. N. Zhang, A. Ebel, N. Neda, P. Brinich, B. Reynwar, A. G. Schmidt, M. Franusich, Jeremy Johnson, B. Reagen and Franz Franchetti
   Generating High-Performance Number Theoretic Transform Implementations for Vector Architectures
   Proc. IEEE High Performance Extreme Computing (HPEC), 2023
   

Franchetti, Franz 

1. G. Xu, Franz Franchetti and James C. Hoe
   An Approach to Generating Customized Load-Store Architectures
   PhD. thesis, Electrical and Computer Engineering, Carnegie Mellon University, 2023
   
2. N. Zhang, A. Ebel, N. Neda, P. Brinich, B. Reynwar, A. G. Schmidt, M. Franusich, Jeremy Johnson, B. Reagen and Franz Franchetti
   Generating High-Performance Number Theoretic Transform Implementations for Vector Architectures
   Proc. IEEE High Performance Extreme Computing (HPEC), 2023
   
3. Qi Guo, Tianshi Chen, Y. Chen and Franz Franchetti
   Accelerating Architectural Simulation Via Statistical Techniques: A Survey
   IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Vol. 35, No. 3, pp. 433-446, 2016
   
4. Berkin Akin, Franz Franchetti and James C. Hoe
   HAMLeT Architecture for Parallel Data Reorganization in Memory
   IEEE Micro, Vol. 36, No. 1, pp. 14-23, 2016
   
5. Qiuling Zhu, Berkin Akin, H. E. Sumbul, F. Sadi, James C. Hoe, Lawrence Pileggi and Franz Franchetti
   A 3D-Stacked Logic-in-Memory Accelerator for Application-Specific Data Intensive Computing
   Proc. IEEE International 3D Systems Integration Conference (3DIC), pp. 1-7, 2013
   
6. Berkin Akin, Peter A. Milder, Franz Franchetti and James C. Hoe
   Algorithm and Architecture Optimization for Large Size Two Dimensional Discrete Fourier Transform
   ACM/SIGDA International Symposium on Field Programmable Gate Arrays (FPGA), 2012
   
7. Tom Henretty, Kevin Stock, Louis-Noël Pouchet, Franz Franchetti, J. Ramanujam and P. Sadayappan
   Data Layout Transformation for Stencil Computations on Short SIMD Architectures
   Proc. International Conference on Compiler Construction (CC), 2011
   

Franusich, M. 

1. N. Zhang, A. Ebel, N. Neda, P. Brinich, B. Reynwar, A. G. Schmidt, M. Franusich, Jeremy Johnson, B. Reagen and Franz Franchetti
   Generating High-Performance Number Theoretic Transform Implementations for Vector Architectures
   Proc. IEEE High Performance Extreme Computing (HPEC), 2023
   

Guo, Qi 

1. Qi Guo, Tianshi Chen, Y. Chen and Franz Franchetti
   Accelerating Architectural Simulation Via Statistical Techniques: A Survey
   IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Vol. 35, No. 3, pp. 433-446, 2016
   

Henretty, Tom 

1. Tom Henretty, Kevin Stock, Louis-Noël Pouchet, Franz Franchetti, J. Ramanujam and P. Sadayappan
   Data Layout Transformation for Stencil Computations on Short SIMD Architectures
   Proc. International Conference on Compiler Construction (CC), 2011
   

Hoe, James C. 

1. G. Xu, Franz Franchetti and James C. Hoe
   An Approach to Generating Customized Load-Store Architectures
   PhD. thesis, Electrical and Computer Engineering, Carnegie Mellon University, 2023
   
2. Berkin Akin, Franz Franchetti and James C. Hoe
   HAMLeT Architecture for Parallel Data Reorganization in Memory
   IEEE Micro, Vol. 36, No. 1, pp. 14-23, 2016
   
3. Qiuling Zhu, Berkin Akin, H. E. Sumbul, F. Sadi, James C. Hoe, Lawrence Pileggi and Franz Franchetti
   A 3D-Stacked Logic-in-Memory Accelerator for Application-Specific Data Intensive Computing
   Proc. IEEE International 3D Systems Integration Conference (3DIC), pp. 1-7, 2013
   
4. Berkin Akin, Peter A. Milder, Franz Franchetti and James C. Hoe
   Algorithm and Architecture Optimization for Large Size Two Dimensional Discrete Fourier Transform
   ACM/SIGDA International Symposium on Field Programmable Gate Arrays (FPGA), 2012
   

Johnson, Jeremy 

1. N. Zhang, A. Ebel, N. Neda, P. Brinich, B. Reynwar, A. G. Schmidt, M. Franusich, Jeremy Johnson, B. Reagen and Franz Franchetti
   Generating High-Performance Number Theoretic Transform Implementations for Vector Architectures
   Proc. IEEE High Performance Extreme Computing (HPEC), 2023
   

Milder, Peter A. 

1. Berkin Akin, Peter A. Milder, Franz Franchetti and James C. Hoe
   Algorithm and Architecture Optimization for Large Size Two Dimensional Discrete Fourier Transform
   ACM/SIGDA International Symposium on Field Programmable Gate Arrays (FPGA), 2012
   

Neda, N. 

1. N. Zhang, A. Ebel, N. Neda, P. Brinich, B. Reynwar, A. G. Schmidt, M. Franusich, Jeremy Johnson, B. Reagen and Franz Franchetti
   Generating High-Performance Number Theoretic Transform Implementations for Vector Architectures
   Proc. IEEE High Performance Extreme Computing (HPEC), 2023
   

Neda, N. 

1. N. Zhang, A. Ebel, N. Neda, P. Brinich, B. Reynwar, A. G. Schmidt, M. Franusich, Jeremy Johnson, B. Reagen and Franz Franchetti
   Generating High-Performance Number Theoretic Transform Implementations for Vector Architectures
   Proc. IEEE High Performance Extreme Computing (HPEC), 2023
   

Pileggi, Lawrence 

1. Qiuling Zhu, Berkin Akin, H. E. Sumbul, F. Sadi, James C. Hoe, Lawrence Pileggi and Franz Franchetti
   A 3D-Stacked Logic-in-Memory Accelerator for Application-Specific Data Intensive Computing
   Proc. IEEE International 3D Systems Integration Conference (3DIC), pp. 1-7, 2013
   

Pouchet, Louis-Noël 

1. Tom Henretty, Kevin Stock, Louis-Noël Pouchet, Franz Franchetti, J. Ramanujam and P. Sadayappan
   Data Layout Transformation for Stencil Computations on Short SIMD Architectures
   Proc. International Conference on Compiler Construction (CC), 2011
   

Ramanujam, J. 

1. Tom Henretty, Kevin Stock, Louis-Noël Pouchet, Franz Franchetti, J. Ramanujam and P. Sadayappan
   Data Layout Transformation for Stencil Computations on Short SIMD Architectures
   Proc. International Conference on Compiler Construction (CC), 2011
   

Reagen, B. 

1. N. Zhang, A. Ebel, N. Neda, P. Brinich, B. Reynwar, A. G. Schmidt, M. Franusich, Jeremy Johnson, B. Reagen and Franz Franchetti
   Generating High-Performance Number Theoretic Transform Implementations for Vector Architectures
   Proc. IEEE High Performance Extreme Computing (HPEC), 2023
   

Reynwar, B. 

1. N. Zhang, A. Ebel, N. Neda, P. Brinich, B. Reynwar, A. G. Schmidt, M. Franusich, Jeremy Johnson, B. Reagen and Franz Franchetti
   Generating High-Performance Number Theoretic Transform Implementations for Vector Architectures
   Proc. IEEE High Performance Extreme Computing (HPEC), 2023
   

Sadayappan, P. 

1. Tom Henretty, Kevin Stock, Louis-Noël Pouchet, Franz Franchetti, J. Ramanujam and P. Sadayappan
   Data Layout Transformation for Stencil Computations on Short SIMD Architectures
   Proc. International Conference on Compiler Construction (CC), 2011
   

Sadi, F. 

1. F. Sadi
   Accelerating Sparse Matrix Kernels with Co-optimized Architecture
   PhD. thesis, Electrical and Computer Engineering, Carnegie Mellon University, 2018
   
2. Qiuling Zhu, Berkin Akin, H. E. Sumbul, F. Sadi, James C. Hoe, Lawrence Pileggi and Franz Franchetti
   A 3D-Stacked Logic-in-Memory Accelerator for Application-Specific Data Intensive Computing
   Proc. IEEE International 3D Systems Integration Conference (3DIC), pp. 1-7, 2013
   

Schmidt, A. G. 

1. N. Zhang, A. Ebel, N. Neda, P. Brinich, B. Reynwar, A. G. Schmidt, M. Franusich, Jeremy Johnson, B. Reagen and Franz Franchetti
   Generating High-Performance Number Theoretic Transform Implementations for Vector Architectures
   Proc. IEEE High Performance Extreme Computing (HPEC), 2023
   

Stock, Kevin 

1. Tom Henretty, Kevin Stock, Louis-Noël Pouchet, Franz Franchetti, J. Ramanujam and P. Sadayappan
   Data Layout Transformation for Stencil Computations on Short SIMD Architectures
   Proc. International Conference on Compiler Construction (CC), 2011
   

Sumbul, H. E. 

1. Qiuling Zhu, Berkin Akin, H. E. Sumbul, F. Sadi, James C. Hoe, Lawrence Pileggi and Franz Franchetti
   A 3D-Stacked Logic-in-Memory Accelerator for Application-Specific Data Intensive Computing
   Proc. IEEE International 3D Systems Integration Conference (3DIC), pp. 1-7, 2013
   

Xu, G. 

1. G. Xu, Franz Franchetti and James C. Hoe
   An Approach to Generating Customized Load-Store Architectures
   PhD. thesis, Electrical and Computer Engineering, Carnegie Mellon University, 2023
   

Zhang, N. 

1. N. Zhang, A. Ebel, N. Neda, P. Brinich, B. Reynwar, A. G. Schmidt, M. Franusich, Jeremy Johnson, B. Reagen and Franz Franchetti
   Generating High-Performance Number Theoretic Transform Implementations for Vector Architectures
   Proc. IEEE High Performance Extreme Computing (HPEC), 2023
   

Zhu, Qiuling 

1. Qiuling Zhu, Berkin Akin, H. E. Sumbul, F. Sadi, James C. Hoe, Lawrence Pileggi and Franz Franchetti
   A 3D-Stacked Logic-in-Memory Accelerator for Application-Specific Data Intensive Computing
   Proc. IEEE International 3D Systems Integration Conference (3DIC), pp. 1-7, 2013
   

Publication interface designed and implemented by Patra Pantupat, Aliaksei Sandryhaila, and Markus Püschel
Electrical and Computer Engineering, Carnegie Mellon University, 2007