Publications

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Corresponding bibtex list 

Journal 

  1. Qi Guo, Tianshi Chen, Y. Chen and Franz Franchetti
    Accelerating Architectural Simulation Via Statistical Techniques: A Survey
    IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Vol. 35, No. 3, pp. 433-446, 2016

Conference (fully reviewed) 

  1. L. Tang, S. Chen, K. Harisrikanth, G. Xu, K. Mai and Franz Franchetti
    A High Throughput Hardware Accelerator for FFTW Codelets: A First Look
    Proc. High Performance Extreme Computing (HPEC), 2022
  2. F. Sadi, Joe Sweeney, S. McMillan, Tze-Meng Low, James C. Hoe, Lawrence Pileggi and Franz Franchetti
    PageRank Acceleration for Large Graphs with Scalable Hardware and Two-Step SpMV
    Proc. High Performance Extreme Computing (HPEC), 2018
  3. Qi Guo, Tze-Meng Low, N. Alachiotis, Berkin Akin, Lawrence Pileggi, James C. Hoe and Franz Franchetti
    Enabling Portable Energy Efficiency with Memory Accelerated Library
    Proc. MICRO, 2015
  4. Tze-Meng Low, Qi Guo and Franz Franchetti
    Optimizing Space Time Adaptive Processing Through Accelerating Memory-Bounded Operations
    Proc. High Performance Extreme Computing (HPEC), 2015
  5. Qi Guo, N. Alachiotis, Berkin Akin, F. Sadi, G. Xu, Tze-Meng Low, Lawrence Pileggi, James C. Hoe and Franz Franchetti
    3D-Stacked Memory-Side Acceleration: Accelerator and System Design
    Proc. Workshop on Near Data Processing (WONDP), 2014
  6. Berkin Akin, Franz Franchetti and James C. Hoe
    Understanding the Design Space of DRAM-optimized Hardware FFT Accelerators
    Proc. IEEE International Conference on Application-Specific Systems, Architectures and Processors (ASAP), pp. 248-255, 2014
  7. Qiuling Zhu, H. E. Sumbul, F. Sadi, James C. Hoe, Lawrence Pileggi and Franz Franchetti
    Accelerating Sparse Matrix-Matrix Multiplication with 3D-Stacked Logic-in-Memory Hardware
    Proc. High Performance Extreme Computing (HPEC), pp. 1-6, 2013

Conference (abstract reviewed) 

  1. N. Zhang, H. Gamil, P. Brinich, B. Reynwar, A. Al Badawi, N. Neda, D. Soni, K. Canida, Y. Polyakov, P. Broderick, M. Maniatakos, A. G. Schmidt, M. Franusich, Jeremy Johnson, B. Reagen, D. B. Cousins and Franz Franchetti
    Towards Full-Stack Acceleration for Fully Homomorphic Encryption
    Proc. High Performance Extreme Computing (HPEC), 2022
  2. Jiyuan Zhang, Tze-Meng Low, Qi Guo and Franz Franchetti
    A 3D-Stacked Memory Manycore Stencil Accelerator System
    Proc. Workshop on Near Data Processing (WONDP), 2015
  3. Qiuling Zhu, Berkin Akin, H. E. Sumbul, F. Sadi, James C. Hoe, Lawrence Pileggi and Franz Franchetti
    A 3D-Stacked Logic-in-Memory Accelerator for Application-Specific Data Intensive Computing
    Proc. IEEE International 3D Systems Integration Conference (3DIC), pp. 1-7, 2013

Thesis 

  1. Jiyuan Zhang
    Accelerating the Motifs of Machine Learning Applications on Modern Processors
    PhD. thesis, Electrical and Computer Engineering, Carnegie Mellon University, 2020
  2. F. Sadi
    Accelerating Sparse Matrix Kernels with Co-optimized Architecture
    PhD. thesis, Electrical and Computer Engineering, Carnegie Mellon University, 2018

Other 

  1. F. Sadi, Lawrence Pileggi and Franz Franchetti
    3D DRAM Based Application Specific Hardware Accelerator for SpMV
    High Performance Extreme Computing Conference (HPEC), 2016
Publication interface designed and implemented by Patra Pantupat, Aliaksei Sandryhaila, and Markus Püschel
Electrical and Computer Engineering, Carnegie Mellon University, 2007